Aiwa CA-DW248 User Manual Page 27
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DEFI
TAI
PDO
VVSS
ISET
VVDD
FR
VSS
EFMO
EFMIN
TEST2
CLV+, CLV-
___
V/P
HFL
TES
TOFF
TGL
JP+, JP-
PCK
FSEQ
VDD
SL+
SL-
PUSW
PUIN
RW
EMPH
C2F
DOUT
TEST3, TEST4
N.C.
MUTEL
LVDD
LCHO
LVSS
RVSS
RCHO
RVDD
I
I
O
—
I
—
I
—
O
I
I
O
O
I
I
O
O
O
O
O
—
I/O
I/O
I/O
I/O
I/O
O
O
O
I
—
O
—
O
—
—
O
—
Defect sense signal (DEF) input pin. (Connect to 0V when not used).
Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
Phase comparator output pin to control external VCO.
For PLL.
GND pin for built-in VCO. Be sure to connect to 0V.
Pin to which external resistor adjusting the PD0 output current. (Pull down)
Power supply pin for built-in VCO.
Pin for VCO frequency range adjustment. (Pull down)
Digital system GND. Be sure to connect to 0V.
For slice level control.
EFM signal output pin.
EFM signal input pin.
Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
Disc motor control output. Three level output is possible using command.
Rough servo or phase control automatic selection monitoring output pin. Rough servo at H.
Phase servo at L.
Track detect signal input pin. Schmidt input.
Tracking error signal input pin. Schmidt input.
Tracking OFF output pin.
Tracking gain selection output pin. Gain boost at L.
Track jump control signal output pin. Three level output is possible using command.
EFM data playback clock monitoring pin 4.3218 MHz when phase is locked in. (Not connected)
Sync signal detection output pin. H when the sync signal which is detected from EFM signal and
thesync signal which is internally generated agree. (Not connected)
Digital system power supply pin.
The pin is controlled by the serial data
command from microprocessor. When
General purpose input/output pin 1 to 5.
the pin is not used, set the pin to the input
terminal and connect to 0V, or alternately
set the pin to output terminal and leave
the pin open.
De-emphasis monitor output pin. De-emphasis disc is being played back at H. (Not connected)
C2 flag output pin. (Not connected)
DIGITAL OUT output pin. (EIAJ format) (Not connected)
Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
(Connected to GND)
Not used. Set the pin to open.
L-channel mute output pin. (Not connected)
L-channel 1-bit DAC.
L-channel power supply pin.
L-channel output pin.
L-channel GND. Be sure to connect to 0V. (Connected to GND)
R-channel GND. Be sure to connect to 0V. (Connected to GND)
R-channel 1-bit DAC. R-channel output pin.
R-channel power supply pin.
Pin No. Pin Name I/O Description
IC DESCRIPTION-2/3 (LC78622NE)-1/2
http://www.xiaoyu163.com
http://www.xiaoyu163.com
- SERVICE MANUAL 1
- SPECIFICATIONS 2
- ACCESSORIES/PACKAGE LIST-1/1 3
- (SF-P101NR) 5
- Resistor Code 9
- Chip Resistor Part Coding 9
- Value of resistor 9
- Chip resistor 9
- TRANSISTOR ILLUSTRATION-1/1 10
- WIRING-1/2 (MAIN, CD, FRONT) 11
- C039 0.01 13
- SCHEMATIC DIAGRAM-3/5 (CD) 14
- SCHEMATIC DIAGRAM-4/5 (FRONT) 15
- MOTOR C.B 16
- 238, 258 17
- < TAPE SECTION > 18
- < TUNER SECTION > 18
- Control logic 19
- VOLTAGE CHART-1/4 21
- VOLTAGE CHART-2/4 22
- VOLTAGE CHART-3/4 23
- VOLTAGE CHART-4/4 24
- ___________ 28
- _________________ 29
- ______________ 30
- ____________ 30
- MECHANICAL EXPLODED VIEW-1/1 31
- MECHANICAL PARTS LIST-1/1 32
- COLOR NAME TABLE 33
- Printed in Singapore 38
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