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Aiwa CDC-X917M User Manual Page 27

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Pin No. Pin Name I/O Description
– 27 –
O
O
I
O
O
O
I
I
I
I
O
–
–
–
–
–
–
I
O
I/O
I/O
I
I
I
I
I
O
I
I
O
O
O
O
O
O
I
–
–
–
O
–
Loading motor reverse drive output. Active “H/L”.
Loading motor forward drive output. Active “H/L”.
Inner edge limit switch. Active “L”.
CD/CD-RW switching output. Active “H”.
Outputs “H” when power is turned on. Active “H”.
Mechanism microprocessor communication request. Active “L”.
SLEEP request from system microprocessor. Active “L”.
Chucking complete switch. Active “L”.
Disc loading switch. Active “L”.
8/12-cm check switch.
CD mechanism power control output. Active “H”.
Connected to GND.
Connected to GND.
For generating main system clock.
For generating main system clock.
Ground.
Power supply.
System reset input.
Laser on/off switching output. Active “H/L”.
LOCK input/output.
Focus OK signal input/output.
C2PO input.
CS signal input. Active “L”.
Sub-code syncronize input.
SENS input.
System microprocessor serial data input.
System microprocessor serial data output.
System microprocessor serial syncronize clock input.
GFS input.
Outputs clock for reading SENS serial data.
Outputs clock for transferring DSP serial data.
DSP serial data latch output.
DSP serial data output.
Muting output. Active “H”.
CD reset output. Active “L”.
Sub-Q/PCM peak/level data input.
Not connected.
Power supply.
Ground.
Outputs clock for reading SQSO.
Not connected.
1
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4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
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23
24
25
26
27
28
29
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31
32
33
34
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37
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39
40
41 ~ 44
LO-REV
LO-FWD
LIMT-SW
RF-SW
SV-CONT
SRQ
SLEEP
CHUCK-SW
LOAD-SW
8/12-SW
CD-ON
NC
IC
X2
X1
VSS
VDD
RESET
APC
LOCK
FOK
C2PO
CS
SCOR
SENS
SYS-DI
SYS-DO
SYS-CLK
GFS
SCLK
CLK-DSP
LAT-DSP
DATA-DSP
CD-MUTE
CD-RST
SQ-IN
NC
VDD
VSS
SQCK
NC
IC, µPD789026GB-A54-8ES
http://www.xiaoyu163.com
http://www.xiaoyu163.com
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