Aiwa XR-M171 Service Manual Page 29

  • Download
  • Add to my manuals
  • Print
  • Page
    / 42
  • Table of contents
  • BOOKMARKS
  • Rated. / 5. Based on customer reviews
Page view 28
1 DEFI I Defect detection signal (DEF) input.
2 TAI I Test input. A pull-down resistor is built in. Must be connected to 0V.
3 PDO O External VCO control phase comparator output.
4 VVSS Internal VCO ground. Must be connected to 0V.
5 ISET O PDO output current adjustment resistor connection.
6 VVDD Internal VCO power supply.
7 FR VCO frequency range adjustment.
8 VSS Digital system ground. Must be connected to 0V.
9 EFMO O Slice level control; EFM signal output.
10 EFMIN I Slice level control; EFM signal input.
11 T2 I Test input. A pull-down resistor is built in. Must be connected to 0V.
12 CLV+
O
Disc motor control output.
13 CLV–
Three-value ouput is also possible when specified by microprocessor command.
14 V/P O
Rough servo/phase control automatic switching monitor output. Outputs a high level
during rough servo and a low level during phase control.
15 HFL I Track detection signal input. This is a Schmitt input.
16 TES I Tracking error signal input. This is a Schmitt input.
17 TOFF O Tracking off output.
18 TGL O Tracking gain switching output. Increase the gain when low.
19 JP+
O
Track jump output.
20 JP–
Three-value output is also possible when specified by microprocessor command.
21 PCK O
EFM data playback clock monitor. Outputs 4.3218 MHz when the phase is locked.
(Not used)
Synchronization signal detection ouput. Outputs a high level when the synchronization
22 FSEQ O signal detected from the EFM signal and the internally generated synchronization signal
agree. (Not used)
23 VDD Digital system power supply.
24 SL+
O Serial data command sled signal output terminal from microprocessor.
25 SL–
26 NC Not used.
27 PU IN I CD pickup inside limit switch.
28 CD R/W O CD R/W gain ON/OFF signal.
29 EMPH O
De-emphasis monitor pin. A high level indicates playback of a de-emphasis disk.
(Not used)
30 C2F O C2 flag output. (Not used)
31 DOUT O Digital output (EIAJ format). (Not used)
32 T3
I Test input. A pull-down resistor is built in. Must be connected to 0V.
33 T4
34 NC Not connected.
35 MUTEL O Left channel one-bit D/A converter mute output.
36 LVDD Left channel one-bit D/A converter power supply.
Pin No. Pin Name I/O Description
IC, LC78622NE
29
Page view 28
1 2 ... 24 25 26 27 28 29 30 31 32 33 34 ... 41 42

Comments to this Manuals

No comments